$RCSfile: L1SisProcessing,v $ $Author: rgr $ $Date: 1997/05/07 06:21:01 $ $Revision: 1.2 $ Description of SIS Level-One Processing The purpose of this document is to describe the processing that occurs on the SIS data during the level-one processing at the ACE Science Center (ASC). I. Overview of ASC Instrument Level-One Processing The data that is the starting point of the level-one processing has the following characteristics: 1. The data consists of a single stream in chronological (S/C clock) order. The raw S/C data can reach the Mission Operation Center (MOC) and eventually the ASC by several paths. The level-zero processing merges the different paths into a single stream and inserts fill data in places where there is missing data. 2. Each S/C minor frame has associated with it a one-bit quality flag. The quality indicates whether the level-zero processing encountered uncorrectable errors in processing the data for that minor frame. If uncorrectable errors are encountered, the level-zero processing removes the minor frame and inserts fill data. 3. The data stream is expected to contain few dropouts, and the dropouts that occur are expected to cluster during time intervals when receiving conditions are poor. The level-one processing of instrument data is performed inside a loop that calls four C functions per instrument for each S/C minor frame. The four functions associated with SIS are 1. accum_sis_level1, 2. accum_sis_browse, 3. output_sis_level1, 4. output_sis_browse. From the names, it is obvious that accum_sis_level1 and output_sis_level1 are associated with the generation and output of SIS level-one data. The other functions are associated with the generation and output of browse data and will not be discussed in this document. The function, output_sis_level1, directly controls the structure and content of the SIS data that is written to the level-one data set which will be distributed to the instrument teams. It has only indirect control of the format of the data written to the CDROM. The format is controlled by the ten functions 1. write_sis_subset, 2. write_sis_hskp, 3. write_sis_dac_offset0, 4. write_sis_dac_offset1, 5. write_sis_command_table, 6. write_sis_low_priority_rate, 7. write_sis_high_priority_rate, 8. write_sis_event, 9. write_sis_command_echo, 10. write_sis_diag_event. Each of the above write functions is written by a PERL script that is furnished by the ASC. The PERL script takes as input the definition of a C data structure and generates a write function with embedded HDF calls. When that PERL-generated write function is called it writes the data to the level-one data set. The ASC will furnish the inverse read functions that will allow the user to recover the original C data structure from the level-one HDF data set. In addition to the instrument data, the level-one product includes S/C housekeeping data. The ASC will furnish functions that given the level-one S/C housekeeping structure, the functions will return the attitude and postion of the S/C. Also the ASC will furnish a function that converts the S/C clock to utc. II. Overview of SIS Telemtry SIS operates on a 256 instrument minor frame cycle. During each instrument cycle, SIS has a sync bit which remains low for the first 128 instrument minor frames and high for the next 128 instrument minor frames. During each instrument cycle, SIS samples each housekeeping parameter once, each low priority rate once, and each high priority rate eight times. In addition, on even instrument cycles, SIS samples the coarse matrix detector DAC settings and PHA offsets. On odd instrument cycles, SIS samples the fine matrix detector DAC settings and PHA offsets. SIS during its normal processing, outputs a collection of compressed events during the instrument cycle. In general, the compressed events will span instrument minor frame boundaries, but during periods of normal processing will not span instrument cycle boundaries. SIS contains an 1180 byte command table which defines the instrument status. During each instrument cycle, 80 bytes of the command table is readout as part of the housekeeping data. It takes about 15 instrument cycles to readout the entire table. When SIS receives a command, it puts a command response in its telemetry. In general, command response spans minor frames and can span cycle boundaries. Finally, SIS can be put into a diagnostic mode. During diagnostic mode, SIS suspends putting compressed events into its telemetry stream, and substitutes diagnostic event data. The housekeeping/rate and command responses are uneffected. The most important point from the above discussion is that SIS produces nine different types of data plus the raw telemetry which is captured in the subset data type. The SIS level-one processing reflects this data organization. III. S/C Minor Frames and Instrument Minor Frames The ACE S/C produces one minor frame of data per second. Within each S/C minor frame there is a 249 byte allocation for SIS data. SIS produces one 249 byte instrument minor frame per second. SIS uses its 249 byte allocation in the S/C minor frame to output exactly one instrument minor frame. The ACE S/C maintains a major frame counter and a minor frame counter. The S/C housekeeping data is tied to these counters, and most instruments' telemetry are also tied to the S/C minor and major frame counters. SIS does not use these counters. IV. Overview of SIS Level-One Processing The SIS level-one processing parses the natural occuring data structures from the raw SIS data. Each data structure which is built contains a S/C clock time tag that allows the data to be traced to the original S/C minor frame and to correlate it with other data. The data inside the structures is left in raw units, i.e. ADC values, PHA value, and counts. The details of each structure is covered in the next section. The level-one processing is done on an instrument cycle basis. In other words, 256 instrument minor frames are processed at a time. The criteria used to determine whether a block of 258 minor frames contains a valid instrument cycle is the following: 1. There must be at least one minor frame in the block that precedes the instrument cycle. It may contain fill data. 2. There must be at least one minor frame in the block that follows the instrument cycle. It may contain fill data. 3. All the minor frames that contain sync transition bits must have the correct sync bit, clock, and minor and major frame counters. 4. At least four of the six minor frames that should contain sync transition bits must be present. 5. The total number of minor frames that have the wrong sync bit or clock or major frame counter or minor frame counter must be less than 4. 6. The total number of frames that have the correct sync bit, clock, major frame counter, and minor frame counter must be at least equal to the number of minor frames in an instrument cycle minus six. If the block passes the test, then the data is processed and put in the appropriate data structure. If the block fails, the following happens: 1. the oldest S/C minor frame is removed from the block, 2. another S/C minor frame is added to the end of the block, 3. the block is retested using the above criteria. In the level-one processing, there is an event recovery algorithm that is used to recover most events from an instrument cycle that has missing minor frames or bit errors. In the SIS telemetry, the length of each event is encoded in the first byte of the event. Once the beginning of an event is found, the beginning of the next event can be found by using the length of the found event to compute the location of the next event. If an instrument cycle has a missing minor frame or a bit error in the wrong place, this chain of finding events is broken. The level-one processing recovers most of the remaining events in the instrument cycle by exploiting the redundant information stored in the event. In an event, not only is the total of length of the event stored in the event, but the length of the components of the event are stored. When the chain of events is broken, the level-one processing finds the other end of the chain by assuming that the first byte after the break is the first byte of the next event. Since the first byte contains the length of the event and the lengths of the components of the events are in fixed locations relative to the start of an event, the "candidate" event can be tested for a self-consistent length. If the "candidate" event passes, the algorithm then uses the length of the "candidate" event to find the next "candidate" event. If a chain of four self-consistent "candidate" events are found, then the algorithm decides it has found the other side of the chain. If a chain of four self-consistent "candidate" events is not found with the first byte after the break, then each successive byte is tested until a chain of four self consistent "candidate" events is found or the end of the cycle is encountered. V. SIS Level One Data Structures For each of the write functions mentioned in section I of this document, there is a corresponding data structure which will be written to the level-one data set using HDF functions. The purpose of this section is to define these data structures and provide some explanation for their existence and form. Each subsection will begin with the actual C structure followed by a brief explanation. The C structures use the symbolic constants defined below. #define MAX_NUM_SIS_CMD_ECHO_CHARS 242 #define MAX_NUM_SIS_NORMAL_EVENT_BYTES 112 #define MAX_SIS_EVT_AGE 8 #define NUM_SIS_EVT_BUFFERS 96 #define NUM_SIS_EVT_BUFFER_BYTES 63488 #define NUM_SIS_HIGH_PRIORITY_RATES 18 #define NUM_SIS_MATRIX_STRIPS 64 #define NUM_SIS_RAW_STACK_EVT_BYTES 538 #define NUM_SIS_TELEMETRY_BYTES 249 A. SIS Subset Structure struct L1SisSubset { uint32 ClockMinorFramePre; uint32 ClockMinorFrame; uint8 FormatIdPre; uint8 FormatId; uint8 MajorFrameCountPre; uint8 MajorFrameCount; uint8 MinorFrameCountPre; uint8 MinorFrameCount; uint8 QualityPre; uint8 quality; uint8 MainBusVoltagePre; uint8 MainBusVoltage; uint8 SisCurrentPre; uint8 SisCurrent; uint8 SisInternalTemperature1Pre; uint8 SisInternalTemperature1; uint8 SisInternalTemperature2Pre; uint8 SisInternalTemperature2; uint8 SisInterfaceTemperaturePre; uint8 SisInterfaceTemperature; uint8 SisCoverTelltalePre; uint8 SisCoverTelltale; uint8 SisData[NUM_SIS_TELEMETRY_BYTES]; }; /* Definition: */ /* ClockMinorFramePre = S/C clock of the minor frame(preliminary) */ /* ClockMinorFrame = S/C clock of the minor frame */ /* FormatIdPre = Format of the minor frame(preliminary) */ /* FormatId = Format of the minor frame */ /* MajorFrameCountPre = Major frame count of the minor */ /* frame(preliminary) */ /* MajorFrameCount = Major frame count of the minor frame */ /* MinorFrameCountPre = Minor frame count of the minor */ /* frame(preliminary) */ /* MinorFrameCount = Minor frame count of the minor frame */ /* QualityPre = Quality flag associated with the minor */ /* frame(preliminary) */ /* quality = Quality flag associated with the subset */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x40 = Level 0 quality bit */ /* MainBusVoltagePre = Main bus voltage value(preliminary) */ /* MainBusVoltage = Main bus voltage value (255=no data) */ /* SisCurrentPre = SIS I/F & survial heater current(preliminary) */ /* SisCurrent = SIS I/F & survial heater current (255=no data) */ /* SisInternalTemperature1Pre = SIS internal temperature 1 */ /* (preliminary) */ /* SisInternalTemperature1 = SIS internal temperature 1 */ /* (255=no data) */ /* SisInternalTemperature2Pre = SIS internal temperature 2 */ /* (preliminary) */ /* SisInternalTemperature2 = SIS internal temperature 2 */ /* (255=no data) */ /* SisInterfaceTemperaturePre = SIS interface temperature */ /* (preliminary) */ /* SisInterfaceTemperature = SIS interface temperature */ /* (255=no data) */ /* SisCoverTelltalePre = SIS cover telltale(preliminary) */ /* SisCoverTelltale = SIS cover telltale (255=no data) */ /* SisData = SIS data */ The structure has a dual purpose. It is used to capture the raw SIS telemetry, and it is also used to capture the SIS-specific S/C housekeeping. The Ace Science Center is discouraging the storing of raw telemetry in the level-one product. So this structure may be modified to hold only the SIS-specific S/C housekeeping. When the S/C is in ADC mode, a complete set of S/C housekeeping comes out in every S/C minor frame. When the S/C is in science mode, the S/C housekeeping set is transmitted over a S/C major frame. Therefore, different S/C housekeeping variables appear in each minor frame. In the other full collection S/C formats, the housekeeping is not present. The level-one processing looks at the S/C format, the minor frame counter, the quality flag, and the preliminary housekeeping values to determine the S/C variables present and to value that should be put in the fields for the SIS-specific S/C housekeeping variables. B. Housekeeping Strucrture struct L1SisHskp { uint32 ClockCycle; uint32 CycleNumber; uint16 TemperatureMotherBoard; uint16 TemperatureT12a; uint16 TemperatureT34a; uint16 TemperatureT56a; uint16 TemperatureT78a; uint16 TemperatureT12b; uint16 TemperatureT34b; uint16 TemperatureT56b; uint16 TemperatureT78b; uint16 TemperatureLvpsBoard; uint16 TemperatureHvpsBoard; uint16 TemperatureAnalogBoard; uint16 TemperaturePostRegBoard; uint16 TemperatureLogicBoard; uint16 TemperatureM2bMatrixBoard; uint16 TemperatureM1aMatrixBoard; uint16 MonitorP19v; uint16 MonitorP13V; uint16 MonitorM13V; uint16 MonitorP5V; uint16 MonitorP4V; uint16 MonitorP7V; uint16 MonitorM7V; uint16 MonitorCurrentA; uint16 MonitorCurrentB; uint16 PostDcT1a; uint16 PostDcT2a; uint16 PostDcT3a; uint16 PostDcT4a; uint16 PostDcT5a; uint16 PostDcT6a; uint16 PostDcT7a; uint16 PostDcT8a; uint16 PostDcT1b; uint16 PostDcT2b; uint16 PostDcT3b; uint16 PostDcT4b; uint16 PostDcT5b; uint16 PostDcT6b; uint16 PostDcT7b; uint16 PostDcT8b; uint8 StatusTelemetrySide; uint8 StatusRefreshEnable; uint8 StatusHeatAuto; uint8 StatusHeatLevel; uint8 QualityCycleNumber; uint8 QualityTemperatureMotherBoard; uint8 QualityTemperatureT12a; uint8 QualityTemperatureT34a; uint8 QualityTemperatureT56a; uint8 QualityTemperatureT78a; uint8 QualityTemperatureT12b; uint8 QualityTemperatureT34b; uint8 QualityTemperatureT56b; uint8 QualityTemperatureT78b; uint8 QualityTemperatureLvpsBoard; uint8 QualityTemperatureHvpsBoard; uint8 QualityTemperatureAnalogBoard; uint8 QualityTemperaturePostRegBoard; uint8 QualityTemperatureLogicBoard; uint8 QualityTemperatureM2bMatrixBoard; uint8 QualityTemperatureM1aMatrixBoard; uint8 QualityMonitorP19v; uint8 QualityMonitorP13V; uint8 QualityMonitorM13V; uint8 QualityMonitorP5V; uint8 QualityMonitorP4V; uint8 QualityMonitorP7V; uint8 QualityMonitorM7V; uint8 QualityMonitorCurrentA; uint8 QualityMonitorCurrentB; uint8 QualityPostDcT1a; uint8 QualityPostDcT2a; uint8 QualityPostDcT3a; uint8 QualityPostDcT4a; uint8 QualityPostDcT5a; uint8 QualityPostDcT6a; uint8 QualityPostDcT7a; uint8 QualityPostDcT8a; uint8 QualityPostDcT1b; uint8 QualityPostDcT2b; uint8 QualityPostDcT3b; uint8 QualityPostDcT4b; uint8 QualityPostDcT5b; uint8 QualityPostDcT6b; uint8 QualityPostDcT7b; uint8 QualityPostDcT8b; uint8 QualityStatusTelemetrySide; uint8 QualityStatusRefreshEnable; uint8 QualityStatusHeatAuto; uint8 QualityStatusHeatLevel; }; /* Definition: */ /* ClockCycle = S/C clock of the first minor frame of the cycle */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ In the SIS telemetry stream, six bytes from each minor frame are used to output housekeeping and rate quantities. SIS generates one set of housekeeping values per instrument cycle. Each housekeeping quantity is sense as it is being put into the telemetry stream. C. DAC and Offset Structures struct L1SisDacOffset0 { uint32 ClockCycle; uint16 M1aGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1aHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2aGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2aHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1bGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1bHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2bGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2bHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 M1aGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M1aHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M2aGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M2aHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bGndCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bHvCoarseDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aHvOffset[NUM_SIS_MATRIX_STRIPS]; }; /* Definition: */ /* ClockCycle = S/C clock of the first minor frame of the cycle */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ struct L1SisDacOffset1 { uint32 ClockCycle; uint16 M1aGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1aHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2aGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2aHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1bGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M1bHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2bGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint16 M2bHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 M1bGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M1bHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M2bGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 M2bHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1aHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2aHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bGndFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bHvFineDac[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM1bHvOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bGndOffset[NUM_SIS_MATRIX_STRIPS]; uint8 QualityM2bHvOffset[NUM_SIS_MATRIX_STRIPS]; }; /* Definition: */ /* ClockCycle = Adjusted S/C clock. The value 256 has been */ /* subtracted from the S/C clock of the first minor */ /* frame of the cycle in which the DAC and offsets */ /* were readout. */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ During even instrument cycles, SIS reads out the coarse DAC values for all the matrix detectors and the offsets for the telescope A matrix detectors. During odd instrument cycles, SIS reads out the fine DAC values for all the matrix detectors and the offsets for the telescope B matrix detectors. Since both of these structures are intended to be used together, the S/C clock of the second structure has been adjusted so that it should correspond to the S/C clock of the first. D. Command Table Structure struct L1SisCommandTable { uint32 ClockMinorFrame0; uint32 ClockMinorFrame1; uint16 coinmsk; uint16 stbfon; uint16 leakint; uint16 hkbltim; uint16 oadjflg; uint16 vrefflg; uint16 scycflg; uint16 mtarget; uint16 mscale; uint16 mbounds[2]; uint16 mnav[2]; uint16 aulkflg; uint16 ttpflg; uint16 rnglim; uint16 claslim[2]; uint16 audgflg; uint16 audglim; uint16 samplim; uint16 heflg; uint16 hyflg; uint16 hetlim; uint16 hytlim; uint8 htcmd[4]; uint16 stmask; uint8 ecmd[2]; uint16 hiprcmd[36]; uint8 sdacval[26]; uint8 sdacsiz[26]; uint8 dacval0[42]; uint8 dacsiz0[42]; uint8 dacval1[6]; uint8 dacsiz1[6]; uint8 hdisc2[8]; uint8 hdisc0[8]; uint8 mdisc2[8]; uint8 mdisc0[8]; uint8 adcen[8]; uint8 gdiscen[8]; uint8 mdiscen[8]; uint8 hdiscen[8]; uint8 dirbits[32]; uint8 calen[64]; uint8 compen[64]; uint8 clasmap[32]; uint16 imthresh[4]; uint16 imflag; uint16 im0arr[10]; uint8 imarr1[20]; uint8 strplim[4]; uint16 mcntlim[4]; uint16 anglim[2]; uint16 cnoc1[8]; uint16 cnoc2[8]; uint16 stimeid; uint8 eidmap[512]; uint16 nbadstp; uint16 badstrp[16]; uint8 QualityCoinmsk; uint8 QualityStbfon; uint8 QualityLeakint; uint8 QualityHkbltim; uint8 QualityOadjflg; uint8 QualityVrefflg; uint8 QualityScycflg; uint8 QualityMtarget; uint8 QualityMscale; uint8 QualityMbounds[2]; uint8 QualityMnav[2]; uint8 QualityAulkflg; uint8 QualityTtpflg; uint8 QualityRnglim; uint8 QualityClaslim[2]; uint8 QualityAudgflg; uint8 QualityAudglim; uint8 QualitySamplim; uint8 QualityHeflg; uint8 QualityHyflg; uint8 QualityHetlim; uint8 QualityHytlim; uint8 QualityHtcmd[4]; uint8 QualityStmask; uint8 QualityEcmd[2]; uint8 QualityHiprcmd[36]; uint8 QualitySdacval[26]; uint8 QualitySdacsiz[26]; uint8 QualityDacval0[42]; uint8 QualityDacsiz0[42]; uint8 QualityDacval1[6]; uint8 QualityDacsiz1[6]; uint8 QualityHdisc2[8]; uint8 QualityHdisc0[8]; uint8 QualityMdisc2[8]; uint8 QualityMdisc0[8]; uint8 QualityAdcen[8]; uint8 QualityGdiscen[8]; uint8 QualityMdiscen[8]; uint8 QualityHdiscen[8]; uint8 QualityDirbits[32]; uint8 QualityCalen[64]; uint8 QualityCompen[64]; uint8 QualityClasmap[32]; uint8 QualityImthresh[4]; uint8 QualityImflag; uint8 QualityIm0arr[10]; uint8 QualityImarr1[20]; uint8 QualityStrplim[4]; uint8 QualityMcntlim[4]; uint8 QualityAnglim[2]; uint8 QualityCnoc1[8]; uint8 QualityCnoc2[8]; uint8 QualityStimeid; uint8 QualityEidmap[512]; uint8 QualityNbadstp; uint8 QualityBadstrp[16]; }; /* Definition: */ /* ClockMinorFrame0 = S/C clock of the minor frame containing the */ /* first byte of the command table */ /* ClockMinorFrame1 = S/C clock of the minor frame containing the */ /* last byte of the command table */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ In each instrument cycle, SIS reads out 80 bytes of the command table. So it takes about one hour to read out a complete command table. When SIS reaches the end of the command table, it immediatley begins to reread the table. Since the readout of the command table spans about an hour, it is assumed the occasionally a minor frame of data will be missing. For places where there is missing data, the level-one processing sets the quality flag for those variables and sets their values to the last value which has no quality bits set. The two clocks associated with the command table only indicate when the readout of the command table started and when it ended. They should not be interpreted to mean that in the time interval the command table's values was stable. E. Low-Priority Rate Structure struct L1SisLowPriorityRate { uint32 ClockCycle; uint32 RejcntsM1a; uint32 RejcntsM2a; uint32 RejcntsM1b; uint32 RejcntsM2b; uint32 RejcntsM1ha; uint32 RejcntsM2ha; uint32 RejcntsT1a; uint32 RejcntsT2a; uint32 RejcntsT3a; uint32 RejcntsT4a; uint32 RejcntsT5a; uint32 RejcntsT6a; uint32 RejcntsT7a; uint32 RejcntsT8a; uint32 RejcntsM12a; uint32 RejcntsMora; uint32 RejcntsHora; uint32 RejcntsHiza; uint32 RejcntsMaybeHiza; uint32 RejcntsZ2a; uint32 RejcntsMaybeZ2a; uint32 RejcntsMaybeZ1a; uint32 RejcntsM1hb; uint32 RejcntsM2hb; uint32 RejcntsT1b; uint32 RejcntsT2b; uint32 RejcntsT3b; uint32 RejcntsT4b; uint32 RejcntsT5b; uint32 RejcntsT6b; uint32 RejcntsT7b; uint32 RejcntsT8b; uint32 RejcntsM12b; uint32 RejcntsMorb; uint32 RejcntsHorb; uint32 RejcntsHizb; uint32 RejcntsMaybeHizb; uint32 RejcntsZ2b; uint32 RejcntsMaybeZ2b; uint32 RejcntsMaybeZ1b; uint32 RejcntsRejFast; uint32 RejcntsStimCoin; uint32 RejcntsHazard; uint32 RejcntsAdc2a; uint32 RejcntsAdc3a; uint32 RejcntsAdc2b; uint32 RejcntsAdc3b; uint32 RejcntsCoinRate0; uint32 RejcntsCoinRate1; uint32 VldcntsM1a; uint32 VldcntsM2a; uint32 VldcntsM1b; uint32 VldcntsM2b; uint32 VldcntsM1ha; uint32 VldcntsM2ha; uint32 VldcntsT1a; uint32 VldcntsT2a; uint32 VldcntsT3a; uint32 VldcntsT4a; uint32 VldcntsT5a; uint32 VldcntsT6a; uint32 VldcntsT7a; uint32 VldcntsT8a; uint32 VldcntsM12a; uint32 VldcntsMora; uint32 VldcntsHora; uint32 VldcntsHiza; uint32 VldcntsMaybeHiza; uint32 VldcntsZ2a; uint32 VldcntsMaybeZ2a; uint32 VldcntsMaybeZ1a; uint32 VldcntsM1hb; uint32 VldcntsM2hb; uint32 VldcntsT1b; uint32 VldcntsT2b; uint32 VldcntsT3b; uint32 VldcntsT4b; uint32 VldcntsT5b; uint32 VldcntsT6b; uint32 VldcntsT7b; uint32 VldcntsT8b; uint32 VldcntsM12b; uint32 VldcntsMorb; uint32 VldcntsHorb; uint32 VldcntsHizb; uint32 VldcntsMaybeHizb; uint32 VldcntsZ2b; uint32 VldcntsMaybeZ2b; uint32 VldcntsMaybeZ1b; uint32 VldcntsRejFast; uint32 VldcntsStimCoin; uint32 VldcntsHazard; uint32 VldcntsAdc2a; uint32 VldcntsAdc3a; uint32 VldcntsAdc2b; uint32 VldcntsAdc3b; uint32 VldcntsCoinRate0; uint32 VldcntsCoinRate1; uint32 EventBuffer[NUM_SIS_EVT_BUFFERS]; uint32 clasacc[4]; uint32 clastot[4]; uint32 livetim; uint32 helivet; uint32 hylivet; uint32 ntagint; uint32 nvldint; uint32 nevproc; uint32 nrtproc; uint32 nbadid; uint32 ncebful; uint32 nrebful; uint32 nhdwrej; uint8 QualityRejcntsM1a; uint8 QualityRejcntsM2a; uint8 QualityRejcntsM1b; uint8 QualityRejcntsM2b; uint8 QualityRejcntsM1ha; uint8 QualityRejcntsM2ha; uint8 QualityRejcntsT1a; uint8 QualityRejcntsT2a; uint8 QualityRejcntsT3a; uint8 QualityRejcntsT4a; uint8 QualityRejcntsT5a; uint8 QualityRejcntsT6a; uint8 QualityRejcntsT7a; uint8 QualityRejcntsT8a; uint8 QualityRejcntsM12a; uint8 QualityRejcntsMora; uint8 QualityRejcntsHora; uint8 QualityRejcntsHiza; uint8 QualityRejcntsMaybeHiza; uint8 QualityRejcntsZ2a; uint8 QualityRejcntsMaybeZ2a; uint8 QualityRejcntsMaybeZ1a; uint8 QualityRejcntsM1hb; uint8 QualityRejcntsM2hb; uint8 QualityRejcntsT1b; uint8 QualityRejcntsT2b; uint8 QualityRejcntsT3b; uint8 QualityRejcntsT4b; uint8 QualityRejcntsT5b; uint8 QualityRejcntsT6b; uint8 QualityRejcntsT7b; uint8 QualityRejcntsT8b; uint8 QualityRejcntsM12b; uint8 QualityRejcntsMorb; uint8 QualityRejcntsHorb; uint8 QualityRejcntsHizb; uint8 QualityRejcntsMaybeHizb; uint8 QualityRejcntsZ2b; uint8 QualityRejcntsMaybeZ2b; uint8 QualityRejcntsMaybeZ1b; uint8 QualityRejcntsRejFast; uint8 QualityRejcntsStimCoin; uint8 QualityRejcntsHazard; uint8 QualityRejcntsAdc2a; uint8 QualityRejcntsAdc3a; uint8 QualityRejcntsAdc2b; uint8 QualityRejcntsAdc3b; uint8 QualityRejcntsCoinRate0; uint8 QualityRejcntsCoinRate1; uint8 QualityVldcntsM1a; uint8 QualityVldcntsM2a; uint8 QualityVldcntsM1b; uint8 QualityVldcntsM2b; uint8 QualityVldcntsM1ha; uint8 QualityVldcntsM2ha; uint8 QualityVldcntsT1a; uint8 QualityVldcntsT2a; uint8 QualityVldcntsT3a; uint8 QualityVldcntsT4a; uint8 QualityVldcntsT5a; uint8 QualityVldcntsT6a; uint8 QualityVldcntsT7a; uint8 QualityVldcntsT8a; uint8 QualityVldcntsM12a; uint8 QualityVldcntsMora; uint8 QualityVldcntsHora; uint8 QualityVldcntsHiza; uint8 QualityVldcntsMaybeHiza; uint8 QualityVldcntsZ2a; uint8 QualityVldcntsMaybeZ2a; uint8 QualityVldcntsMaybeZ1a; uint8 QualityVldcntsM1hb; uint8 QualityVldcntsM2hb; uint8 QualityVldcntsT1b; uint8 QualityVldcntsT2b; uint8 QualityVldcntsT3b; uint8 QualityVldcntsT4b; uint8 QualityVldcntsT5b; uint8 QualityVldcntsT6b; uint8 QualityVldcntsT7b; uint8 QualityVldcntsT8b; uint8 QualityVldcntsM12b; uint8 QualityVldcntsMorb; uint8 QualityVldcntsHorb; uint8 QualityVldcntsHizb; uint8 QualityVldcntsMaybeHizb; uint8 QualityVldcntsZ2b; uint8 QualityVldcntsMaybeZ2b; uint8 QualityVldcntsMaybeZ1b; uint8 QualityVldcntsRejFast; uint8 QualityVldcntsStimCoin; uint8 QualityVldcntsHazard; uint8 QualityVldcntsAdc2a; uint8 QualityVldcntsAdc3a; uint8 QualityVldcntsAdc2b; uint8 QualityVldcntsAdc3b; uint8 QualityVldcntsCoinRate0; uint8 QualityVldcntsCoinRate1; uint8 QualityEventBuffer[NUM_SIS_EVT_BUFFERS]; uint8 QualityClasacc[4]; uint8 QualityClastot[4]; uint8 QualityLivetim; uint8 QualityHelivet; uint8 QualityHylivet; uint8 QualityNtagint; uint8 QualityNvldint; uint8 QualityNevproc; uint8 QualityNrtproc; uint8 QualityNbadid; uint8 QualityNcebful; uint8 QualityNrebful; uint8 QualityNhdwrej; }; /* Definition: */ /* ClockCycle = Adjusted S/C clock of the first minor frame of */ /* the cycle in which the rate was accumulated. */ /* The value 256 is subtracted from the S/C clock of */ /* the first minor frame of the cycle in which the */ /* low priority rates were readout. */ /* */ /* Note: All rates are decompressed. */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ The SIS low priority rates are readout once per instrument cycle. At the start of each instrument cycle, all the low-priority rate counters are initialized to zero. The rates are then accumulated for one instrument cycle, and readout in the next. So, the S/C is adjusted to correspond to the start of the accumulation period. F. High-Priority Rate Structure struct L1SisHighPriorityRate { uint32 ClockMinorFrame; uint32 hp[NUM_SIS_HIGH_PRIORITY_RATES]; uint8 QualityHp[NUM_SIS_HIGH_PRIORITY_RATES]; }; /* Definition: */ /* ClockMinorFrame = Adjusted S/C clock of the minor frame in */ /* which the high priority rate accumulation */ /* began */ /* hp = high priority rates */ /* QualityHp = Flags for missing high priority rates */ /* */ /* Note: All rates are decompressed. */ /* */ /* Note: Quality bits are defined in the table below. If the field */ /* which the quality byte is trying to characterize contains */ /* multiple bytes, the quality byte associated with the field */ /* is the logical "or" of the individual quality bytes. */ /* */ /* Quality bits: */ /* 0x01 = Format ID error */ /* 0x02 = Minor/major counter error */ /* 0x04 = S/C clock error */ /* 0x08 = Sync bit error */ /* 0x10 = Command table index error */ /* 0x20 = Cycle number error */ /* 0x40 = Level 0 quality bit */ /* 0x80 = Level 1 quality bit */ Each SIS high-priority rates are readout eight times during an instrument cycle. All the rates are latched at the beginning of each instrument cycles and every 32 minor frames after that. The high priority rates are then readout in the following 1/8 instrument cycle. The S/C clock is adjusted to correspond to the beginning of each accumulation interval. The variables that go into the high-priority rates are controlled by the array h1prcmd found in the command table. G. Compressed Event Structure struct L1SisEvent { uint32 ClockCycle; uint16 NumberNormalEventBytes[MAX_SIS_EVT_AGE]; uint16 NumberEvents; uint8 EventBuffer[NUM_SIS_EVT_BUFFER_BYTES]; uint8 ContinuationFlag; }; /* Definition: */ /* ClockCycle = S/C clock of the first minor frame of the cycle */ /* in which SIS processed the events */ /* NumberNormalEventBytes = Number of bytes in each of the cycles */ /* that is used for normal event */ /* transmision (including padding bytes) */ /* NumberEvents = Number of events stored in the event buffer */ /* EventBuffer = Event buffer */ /* ContinuationFlag = Flag indicating events from this cycle are */ /* continued in the next structure */ /* */ /* Note: Each event in the event buffer is preceded by two bytes. */ /* The first is the relative age of the event. The second is */ /* minor frame in which the first byte of the event was */ /* transmitted. */ The SIS compressed events occupy most of the SIS data stream. These events come from SIS in a compressed form, and this form is maintained during the level-one processing. Even though it would have been possible to define a fixed data structure to store each event, it was felt that this would result in greatly enlarged data files. Since the work to expand a compressed event should be small compared to the work of analysing the event, it was felt that doing the expansion at analysis time was more appropriate. Standard functions to expand the compressed event into a fixed structure can be furnished to the SIS team members. The actual events have an internal time tag with a resolution of 256 seconds. The S/C clock associated with an event is the time the event was put in the telemetry stream; it is not the time that SIS processed the event. For low priority events, the readout time can be significantly different from the time the event was processed. The continuation flag in the data structure is only expected to be used infrequently. H. Command Echo Structure struct L1SisCommandEcho { uint32 ClockMinorFrame; uint8 NumberChars; char8 CommandEcho[MAX_NUM_SIS_CMD_ECHO_CHARS]; }; /* Definition: */ /* ClockMinorFrame = S/C clock of the minor frame containing the */ /* command echo */ /* NumberChars = Number of characters in the command echo */ /* CommandEcho = Command echo characters */ Whenever a command is received, SIS puts a command response in its telemetry. There is no agreed-upon limit on the size of the SIS command response. Also, the form of the command response is ASCII characters with embedded linefeeds and carriage returns. The command response was designed to be displayed on a "dumb" terminal and to be interpreted by humans. Since command responses usually span minor frames and also can span instrument cycles, there is no simple way to determine where one command response ends and another begins. To keep the level-one processing simple, it was decided to call the portion of the command response that appears in a instrument minor frame a command echo and define a structure to contain it. I. Diagnostic Event Structure struct L1SisDiagnosticEvent { uint32 ClockMinorFrame0; uint32 ClockMinorFrame1; uint16 RawStack[NUM_SIS_RAW_STACK_EVT_BYTES/2]; uint8 NormalEvent[MAX_NUM_SIS_NORMAL_EVT_BYTES]; }; /* Definition: */ /* ClockMinorFrame0 = S/C clock of the minor frame containing */ /* the start of the diagnostic event */ /* ClockMinorFrame1 = S/C clock of the minor frame containing */ /* the end of the diagnostic event */ /* RawStack = Raw stack event portion of the diagnostic event */ /* NormalEvent = Normal event portion of the diagnostic event */ A SIS diagnostic event consists of a raw event and a compresed event. The size of the SIS raw event is 538 bytes. The maximum size of a SIS compressed event is 112 bytes.